1. Field of the Invention
This invention relates to the use of field effect transistors (FETs) in power supplies and more particularly to an arrangement of FETs for use in high frequency switching type power supplies.
2. Description of the Prior Art
In the past, switching type power supplies operated at relatively low frequencies such as 60 Hz. This low frequency of operation had a number of drawbacks, among which were the large size of the power transformers and the generation of audible noise.
In order to overcome the above drawbacks, it has become common in the past several years for switching type power supplies to be operated at frequencies typically in the range of 20 to 40 KHz. Operation at such frequencies allowed the size of the power transformer to be reduced and did not give rise to noise in the audible range. Switching power supplies operating at such frequencies have typically used bipolar transistors for the switching elements.
A further reduction in the size of the power transformer can be achieved by switching the power handling devices of the supply at a still higher frequency, as for example, 200 KHz. Bipolar transistors have certain characteristics which make their use in the switched mode undesirable at such frequencies.
One of these undesirable characteristics is that the storage time of such devices is typically in the order of one microsecond. At a switching frequency of 20 and 40 KHz this storage time is relatively small as compared to the time between switching pulses. At switching frequency of 200 KHz the storage time becomes a significant portion of the time between switching pulses. FETs do not have this undesirable characteristic.
Another undesirable characteristic of bipolar transistors is that such devices have a relatively small safe operating area when compared to FETs. In switching power supply applications, a bipolar transistor is typically operated at one-half of its rated current. For the same application a FET will be typically operated at one-sixth of its rated current. The FET, has therefore, a relatively large safe operating area as compared to a bipolar transistor and when operated in the switched mode, FETs are more efficient than bipolar transistors.
Finally, a power supply switching at 200 KHz is much more sensitive to parasitic elements (particularly inductances) than a supply switched at 20 to 40 KHz. At a 200 KHz switching frequency there are relatively fast rates of change of current and voltage which can give rise to large disturbances in the voltage and current, respectively, as a result of the parasitic elements. The drive circuit for FETs is generally more adaptable to such elements as compared to the same circuit for bipolar transistors. Therefore, the use of FETs at such switching frequencies is desired.
In using FETs for power switching it is often necessary to connect a number of FETs in parallel in order to handle the current associated with the supply. FET circuits have associated therewith stray inductance and resistance and the FETs have unequal delay and fall times. In typical prior art arrangements of FETs in parallel, the stray inductances and resistances are not the same for each FET. Therefore, when a number of FETs are placed in parallel, the unequal stray inductances, delay and fall times will cause different rates of change for the current in each FET for a given power pulse and the unequal stray resistances will cause different current levels in each FET for various portions of the power pulse. Thus, it is desirable to find an arrangement of FETs which will allow a number of FETs to be placed in parallel and also minimize the undesirable effects of the stray inductances and resistances, delay and fall times described above.